 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC * The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4077B gates Quadruple exclusive-NOR gate Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification Quadruple exclusive-NOR gate DESCRIPTION The HEF4077B provides the exclusive-NOR function. The outputs are fully buffered for best performance. HEF4077B gates Fig.2 Pinning diagram. Fig.1 Functional diagram. HEF4077BP(N): HEF4077BD(F): HEF4077BT(D): 14-lead DIL; plastic (SOT27-1) 14-lead DIL; ceramic (cerdip) (SOT73) 14-lead SO; plastic (SOT108-1) ( ): Package Designator North America TRUTH TABLE An L L H H Note 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) Fig.3 Logic diagram (one gate). FAMILY DATA, IDD LIMITS category GATES See Family Specifications Bn L H L H On H L L H January 1995 2 Philips Semiconductors Product specification Quadruple exclusive-NOR gate AC CHARACTERISTICS VSS = 0 V; Tamb = 25 C; CL = 50 pF; input transition times 20 ns VDD V Propagation delays An, Bn On HIGH to LOW 5 10 15 5 LOW to HIGH Output transition times HIGH to LOW 5 10 15 5 LOW to HIGH 10 15 tTLH tTHL 60 30 20 60 30 20 120 60 40 120 60 40 ns ns ns ns ns ns 10 15 tPLH tPHL 75 35 30 70 30 25 150 70 55 145 60 50 ns ns ns ns ns ns SYMBOL TYP. MAX. HEF4077B gates TYPICAL EXTRAPOLATION FORMULA 48 ns + (0,55 ns/pF) CL 24 ns + (0,23 ns/pF) CL 22 ns + (0,16 ns/pF) CL 43 ns + (0,55 ns/pF) CL 19 ns + (0,23 ns/pF) CL 17 ns + (0,16 ns/pF) CL 10 ns + (1,0 ns/pF) CL 9 ns + (0,42 ns/pF) CL 6 ns + (0,28 ns/pF) CL 10 ns + (1,0 ns/pF) CL 9 ns + (0,42 ns/pF) CL 6 ns + (0,28 ns/pF) CL VDD V Dynamic power dissipation per package (P) 5 10 15 TYPICAL FORMULA FOR P(W) 850 fi + (foCL) x VDD2 4 500 fi + (foCL) x VDD 2 where fi = input freq. (MHz) fo = output freq. (MHz) CL = load capacitance (pF) (foCL) = sum of outputs VDD = supply voltage (V) 14 700 fi + (foCL) x VDD2 January 1995 3 |
Price & Availability of HEF4077B
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |